Compound-semiconductor-based filed effect transistors (FETs), for example GaN-based FETs have higher withstand voltages than conventional Si-MOSFETs and hold great promise as a high-withstand-voltage power device in applications such as automobiles.
Like conventional Si-MOSFETs, there are so-called lateral and vertical GaN-FETs. In a lateral FET, a drain electrode, a gate electrode and a source electrode are disposed side by side on a semiconductor substrate or a semiconductor layer. In a vertical FET, a drain electrode, a gate electrode, and a source electrode are stacked in layers.
The vertical FET has the following advantages over the lateral FET.
The amount of current per semiconductor chip is larger because current flows through vertical paths. The area of the chip is smaller because the source electrode and the drain electrode, which require large areas because a high current flows through them, are disposed above and below, respectively, the gate electrode. Furthermore, since the proportion of metal per semiconductor chip is larger, the vertical FET has better dissipation characteristics.
Vertical GaN-FETs have been devised in the past. In the GaN-FET, a compound semiconductor layer has the so-called npn structure where layers of compound semiconductors, namely n-type GaN (n-GaN), p-type GaN (p-GaN), and n-GaN are stacked. A gate electrode is provided to fill a trench formed in the compound semiconductor layers (See Patent Literature 1 and Non Patent Literatures 1 and 2).